Changes in Version 2 of GraspSwControllerCmdReset
- isani
- Timestamp:
- Thu May 12 17:24:42 2011
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GraspSwControllerCmdReset
v1 v2 1 1 '''[wiki:GraspSwControllerCmd reset]''' 2 2 [[TracNav(GraspContents)]] 3 3 ||Command:||'''reset'''|| 4 4 ||Contexts:||Network socket, serial console.|| 5 5 ||Function:||Resets the STARGRASP FPGA board into its power-on state, "stage1".|| 6 6 ||Required Parameters:||none.|| 7 ||Optional Parameters:|| none.||7 ||Optional Parameters:||'''keeplog''' - Causes reset to keep the log of recent message intact just like an unexpected reset, so they will all get displayed when stage1 reboots.|| 7 7 This command does not reset any analog functions. Specifically, 8 8 DAC outputs get left where they were and only the CPU in the FPGA 9 9 is reset. Use "dac init" before "reset" to bring all DAC outputs 10 10 back to 50 mV. 11 11 === Notes: === 12 12 If the "dac init" Vref value is left at a non-standard offset, 13 13 the DACs may be inoperable after a soft reset. 14 14 If "stage1" code in BRAM has been corrupted, power cycling 15 15 may be required.